Networks on chips: A new SoC paradigm

被引:1771
作者
Benini, L [1 ]
De Micheli, G
机构
[1] Univ Bologna, Dept Elect & Comp Sci, I-40126 Bologna, Italy
[2] Stanford Univ, Stanford, CA 94305 USA
关键词
Globally asynchronous chips - Locally synchronous chips - Micronetwork control - On chip micronetworks - On chip signal transmission - System on chip design - Wiring delays;
D O I
10.1109/2.976921
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
On-chip micronetworks, designed with a layered methodology, will meet the distinctive challenges of providing functionally correct, reliable operation of interacting system-on-chip components.
引用
收藏
页码:70 / +
页数:10
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