Ultra thin high quality Ta2O5 gate dielectrics prepared by in-situ rapid thermal processing

被引：8

作者：

Luan, HF ^{[1
]}

Lee, SJ ^{[1
]}

Lee, CH ^{[1
]}

Mao, AY ^{[1
]}

Vrtis, R ^{[1
]}

Roberts, D ^{[1
]}

Kwong, DL ^{[1
]}

机构：

[1] Univ Texas, Dept Elect & Comp Engn, Ctr Microelect Res, Austin, TX 78712 USA

来源：

ULTRATHIN SIO2 AND HIGH-K MATERIALS FOR ULSI GATE DIELECTRICS | 1999年 / 567卷

关键词：

D O I：

10.1557/PROC-567-385

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

In this paper, ultra thin CVD Ta2O5 stacked gate dielectrics (Teq similar to 14 Angstrom-22 Angstrom) was fabricated by in-situ RTP processing. The leakage current of Ta2O5 devices is 10(3)x lower leakage current compared to SiO2 of identical thickness for devices with Teq between 18 Angstrom-22 Angstrom. While Teq<18 Angstrom, the leakage current follows same train and J similar to 10(-3)A/cm(2) for Ta2O5 stacked gate dielectrics with Teq=14 Angstrom. Superior interface properties and reliability have been obtained.

引用

页码：385 / 390

页数：6

共 6 条

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