Impact of atomic-layer-deposited TiN on the gate oxide quality of W/TiN/SiO2/Si metal-oxide-semiconductor structures

被引:46
作者
Park, DG [1 ]
Lim, KY [1 ]
Cho, HJ [1 ]
Cha, TH [1 ]
Yeo, IS [1 ]
Roh, JS [1 ]
Park, JW [1 ]
机构
[1] Hynix Semicond Inc, Memory Res & Dev Div, Ichon Si 467701, Kyoungki Do, South Korea
关键词
D O I
10.1063/1.1468273
中图分类号
O59 [应用物理学];
学科分类号
摘要
We demonstrate the impact of atomic-layer-deposited TiN gate on the characteristics of W/TiN/SiO2/p-Si metal-oxide-semiconductor (MOS) systems. Damage-free gate oxide quality was attained with atomic-layer-deposition (ALD)-TiN as manifested by an excellent interface trap density (D-it) as low as similar to4x10(10) eV(-1) cm(-2) near the Si midgap. ALD-TiN improved the D-it level of MOS systems on both thin SiO2 and high-permittivity (high-k) gate dielectrics. The leakage current of a MOS capacitor gated with ALD-TiN is remarkably lower than that with sputter-deposited TiN and poly-Si gate at the similar capacitance equivalent thickness (CET). Less chlorine content in ALD-TiN films appears to be pivotal in minimizing the CET increase against postmetal anneal and improving gate oxide reliability, paving a way for the direct metal gate process. (C) 2002 American Institute of Physics.
引用
收藏
页码:2514 / 2516
页数:3
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