SiGe heterostructure CMOS circuits and applications

被引：22

作者：

Parker, EHC ^{[1
]}

Whall, TE ^{[1
]}

机构：

[1] Univ Warwick, Dept Phys, Coventry CV4 7AL, W Midlands, England

来源：

SOLID-STATE ELECTRONICS | 1999年 / 43卷 / 08期

关键词：

D O I：

10.1016/S0038-1101(99)00095-7

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A review is given of the 300 K electron and hole mobilities in Si/SeGe heterostructures and the potential applications of these materials in CMOS technology. Prospects for further enhancements in carrier mobility and CMOS process design options are discussed for Si/SiGe strained layers on Si and on relaxed SiGe 'virtual substrates'. Recent work on heterointerface quality, limited area growth of virtual substrates, carrier mobility and velocity-field characteristics is also reported. (C) 1999 Elsevier Science Ltd. All rights reserved.

引用

页码：1497 / 1506

页数：10