CMOS distributed amplifier design using CAD optimization techniques

被引：3

作者：

Allstot, DJ ^{[1
]}

Ballweber, BM ^{[1
]}

Gupta, R ^{[1
]}

机构：

[1] Arizona State Univ, Dept Elect Engn, Tempe, AZ 85287 USA

来源：

1999 SOUTHWEST SYMPOSIUM ON MIXED-SIGNAL DESIGN, SSMSD 99 | 1999年

关键词：

D O I：

10.1109/SSMSD.1999.768607

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A four-stage distributed amplifier exhibits 6.5dB gain, 5.5GHz bandwidth, and 80 mW power dissipation from a 3V supply in 0.6 mu m CMOS. Scalable inductor models and custom CAD tools optimize performance.

引用

页码：140 / 146

页数：7

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