Very low Vt [Ir-Hf]/HfLaO CMOS using novel self-aligned low temperature shallow junctions

被引：30

作者：

Cheng, C. F. ^{[1
]}

Wu, C. H. ^{[2
]}

Su, N. C. ^{[2
]}

Wang, S. J. ^{[2
]}

McAlister, S. P. ^{[3
]}

Chin, Albert ^{[1
]}

机构：

[1] Natl Chiao Tung Univ, Dept EE, Hsinchu, Taiwan

[2] Natl Cheng Kung Univ, Inst Microelect, Dept Elect Engn, Tainan, Taiwan

[3] CNR, Ottawa, ON, Canada

来源：

2007 IEEE INTERNATIONAL ELECTRON DEVICES MEETING, VOLS 1 AND 2 | 2007年

关键词：

D O I：

10.1109/IEDM.2007.4418939

中图分类号：

T [工业技术];

学科分类号：

08 ;

摘要：

We report very low V-t [Ir-Hf]/HfLaO CMOS using novel self-aligned low-temperature ultra shallow junctions with gate-first process compatible with current VLSI. At 1.2 nm EOT, good phi(m-eff) of 5.3 and 4.1 eV, low V-t of +0. 05 and 0.03 V, high mobility of 90 and 243 cm(2)/Vs, and small 85 degrees C BTI <32 mV (10 MV/cm, 1 hr) are measured for p- and n-MOS.

引用

页码：333 / +

页数：3

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