Gigabit-per-second, ECL-compatible I/O interface in 0.35-μm CMOS

被引：8

作者：

Djahanshahi, H ^{[1
]}

Hansen, F

Salama, CAT

机构：

[1] Univ Toronto, Dept Elect & Comp Engn, Toronto, ON M5G 3G4, Canada

[2] Vitesse Semicond Corp, Camarillo, CA 93012 USA

来源：

IEEE JOURNAL OF SOLID-STATE CIRCUITS | 1999年 / 34卷 / 08期

基金：

加拿大自然科学与工程研究理事会;

关键词：

CMOS; input/output (I/O); pseudo-emitter-coupled logic;

D O I：

10.1109/4.777105

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This paper presents high-speed differential input and output (I/O) interface circuits for gigabit-per-second serial data communication. The circuits are implemented in a 3.3-V/0.35-mu m CMOS process. Signal levels are compatible with industry standards for low-voltage positive emitter-coupled logic (ECL), with the possibility of ac-coupling to standard ECL systems. A differential open-drain circuit with pulsed bias and active pullups offers significantly improved speed performance for a transmitter and creates wide open eye patterns. Combining circuit techniques with the features of a submicrometer technology, the presented I/O blocks enable a full-CMOS chip to communicate with highspeed ECL-compatible systems and ease up a common I/O-related speed bottleneck. The circuits operate at 622 Mb/s (OC-12) and 1.24 Gb/s (OC-24) in a repeater and a retimer configuration. The asynchronous performance of the receiver and the transmitter was tested at rates up to 2.5 Gb/s.

引用

页码：1074 / 1083

页数：10

共 7 条

[1] Giga bit per second per pin differential CMOS circuits for pseudo ECL signaling [J].

Djahanshahi, H ;

Hansen, F ;

Salama, CAT .

PROCEEDINGS OF THE IEEE 1999 CUSTOM INTEGRATED CIRCUITS CONFERENCE, 1999, :601-604

[2]

GOGAERT S, 1995, PROCEEDINGS OF THE IEEE 1995 CUSTOM INTEGRATED CIRCUITS CONFERENCE, P447, DOI 10.1109/CICC.1995.518221

[3]

GUNNING B, 1992, ISSCC, P58

[4] A SELF-TERMINATING LOW-VOLTAGE SWING CMOS OUTPUT DRIVER [J].

KNIGHT, TF ;

KRYMM, A .

IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1988, 23 (02) :457-464

[5]

Ohtomo Y, 1996, IEICE T ELECTRON, VE79C, P524

[6]

SHUMACHER HJ, 1990, IEEE J SOLID STATE C, V25, P150

[7] ECL CMOS AND CMOS ECL INTERFACE IN 1.2-MU-M CMOS FOR 150-MHZ DIGITAL ECL DATA-TRANSMISSION SYSTEMS [J].

STEYAERT, MSJ ;

BIJKER, W ;

VORENKAMP, P ;

SEVENHANS, J .

IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1991, 26 (01) :18-24

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