Fabrication of one-dimensional nanowire structures utilizing crystallographic orientation in silicon and their conductance characteristics

We propose a process for fabricating one-dimensional Si nanowires with a point contact. The nanowire structure can be easily obtained through two steps: KOH etching of a {110} Si layer of a silicon on insulator substrate and sufficient oxidation of the Si patterns formed by etching. In the etching process, vertical sidewalls comprised of {111} planes are formed into a wire. In addition, other {111} planes, projecting obliquely along the vertical sidewalls, spontaneously appear in the etched substrate. This is due to the fact that the etching proceeds as {111} planes appear because the etch rate of the {111} plane is the lowest of all planes. The bottom-corner region of two inclined {111} planes becomes a point-contact structure by making the distance between two inclined planes appropriate. The oxidation process converts the two-dimensional wire into one-dimensional nanowire by the stress-dependent oxidation phenomena of the Si wire. Consequently, a Si nanowire with a point contact can be formed in the bottom region. The Si nanowires fabricated through this process show clear conductance steps with little fluctuation on plateaus at 45 K. In addition, we discuss the conductance step characteristics in connection with a calculated energy level for a nanowire in {110} Si. (C) 1997 American Vacuum Society. [S0734-211X(97)03105-3].