Carrier mobility enhancement in strained Si-On-Insulator fabricated by wafer bonding

被引：47

作者：

Huang, LJ ^{[1
]}

Chu, JO ^{[1
]}

Goma, S ^{[1
]}

D'Emic, CP ^{[1
]}

Koester, SJ ^{[1
]}

Canaperi, DF ^{[1
]}

Mooney, PM ^{[1
]}

Cordes, SA ^{[1
]}

Speidell, JL ^{[1
]}

Anderson, RM ^{[1
]}

Wong, HSP ^{[1
]}

机构：

[1] IBM Corp, Thomas J Watson Res Ctr, Yorktown Hts, NY 10598 USA

来源：

2001 SYMPOSIUM ON VLSI TECHNOLOGY, DIGEST OF TECHNICAL PAPERS | 2001年

关键词：

D O I：

10.1109/VLSIT.2001.934945

中图分类号：

T [工业技术];

学科分类号：

08 ;

摘要：

N- and p-MOSFETs have been fabricated in strained Si on SiGe on insulator (SSOI) with high (15-25%) Ge content. Wafer bonding and H-induced layer transfer techniques enabled the fabrication of the high Ge content SiGe-On-Insulator (SGOI) substrates. Mobility enhancement of 46% for electrons and 60-80% for holes (for 20%-25 k Ge content, respectively) has been demonstrated in SSOI MOSFETs. This could lead to next generation device performance enhancement.

引用

页码：57 / 58

页数：2

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