Process integration of self-assembled polymer templates into silicon nanofabrication

被引:129
作者
Guarini, KW [1 ]
Black, CT [1 ]
Zhang, Y [1 ]
Kim, H [1 ]
Sikorski, EM [1 ]
Babich, IV [1 ]
机构
[1] IBM Corp, Thomas J Watson Res Ctr, Yorktown Hts, NY 10598 USA
来源
JOURNAL OF VACUUM SCIENCE & TECHNOLOGY B | 2002年 / 20卷 / 06期
关键词
D O I
10.1116/1.1521730
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Self-assembled diblock copolymer thin films are used as sacrificial layers for the transfer of dense nanoscale patterns into more robust materials. We detail the processes used to achieve highly uniform nanoporous dielectric films, high-aspect-ratio nanotextured silicon, silicon nitride dot arrays, silicon pillar arrays, and silicon tip arrays. All techniques are compatible with standard semiconductor fabrication processes. We also discuss the possible applications of each resulting manometer-scale structure, including high surface area substrates for capacitors and biochips, quantum dot arrays for nonvolatile memories, and silicon pillar arrays for vertical transistors or field-emission displays. (C) 2002 American Vacuum Society.
引用
收藏
页码:2788 / 2792
页数:5
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