Investigation of DC hot-carrier degradation at elevated temperatures for p-channel metal-oxide-semiconductor field-effect transistors of 0.13 μm technology

被引：9

作者：

Chen, Shuang-Yuan ^{[1
]}

Tu, Chia-Hao ^{[1
]}

Lin, Jung-Chun ^{[2
]}

Wang, Mu-Chun ^{[3
]}

Kao, Po-Wei ^{[1
]}

Lin, Memg-Hong ^{[1
]}

Wu, Ssu-Han ^{[4
]}

Jhou, Ze-Wei ^{[4
]}

Chou, Sam ^{[4
]}

Ko, Joe ^{[4
]}

Haung, Heng-Sheng ^{[1
]}

机构：

[1] Natl Taipei Univ TEchnol, Inst Mechatron Engn, Taipei 106, Taiwan

[2] ProMOS Technol, Special Tech Dev Grp, Hsinchu 30078, Taiwan

[3] Minghsin Univ Sci & Technol, Dept Elect Engn, Hsinchu, Taiwan

[4] United Microelect Corp, Special Technol Div, Hsinchu 300, Taiwan

来源：

JAPANESE JOURNAL OF APPLIED PHYSICS | 2008年 / 47卷 / 03期

关键词：

temperature; pMOSFETs; hot carrier (HC); NBTI; reliability; analog circuit;

D O I：

10.1143/JJAP.47.1527

中图分类号：

O59 [应用物理学];

学科分类号：

摘要：

Low voltages in two stress modes and at three temperatures were applied to two kinds of p-channel metal-oxide-semiconductor field-effect transistors (pMOSFETs) to investigate the substrate current variations and hot-carrier (HC)induced degradation. Contrary to conventional concepts, this investigation reveals that the worst conditions for pMOSFET HC reliability involve channel HC (CHC) mode and high temperatures. The severity of degradation of pMOSFETs has become comparable to their n-channel MOSFET (nMOSFET) counterparts. A probable damage mechanism is suggested to involve the generation of interface states owing to the integration of HCs and the negative-biased temperature effect (NBTI). A new empirical lifetime model is proposed in terms of applied voltages and temperatures.

引用

页码：1527 / 1531

页数：5

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