Sub-100 nm silicon on insulator complimentary metal-oxide semiconductor transistors by deep ultraviolet optical lithography

We report results on the fabrication of deep sub-100 nm silicon-on-insulator (SOI) complimentary metal-oxide semiconductor transistors using phase-shift double-exposure deep ultraviolet optical lithography. Resist gate features down to 40 nm were resolved corresponding to lambda /6 resolution or k(1)=0.1. Using an etch bias, we have fabricated polysilicon Sate features down to 25 nm corresponding to lambda /10 resolution or k(1)=0.06. Good process latitudes were obtained, and SOI transistor results down to 50 nm gate length are reported. (C) 2000 American Vacuum Society. [S0734-211X(00)03006-7].