Improvement of threshold voltage deviation in damascene metal gate transistors

被引:70
作者
Yagishita, A [1 ]
Saito, T [1 ]
Nakajima, K [1 ]
Inumiya, S [1 ]
Matsuo, K [1 ]
Shibata, T [1 ]
Tsunashima, Y [1 ]
Suguro, K [1 ]
Arikado, T [1 ]
机构
[1] Toshiba Co Ltd, Proc & Mfg Engn Ctr, Semicond Co, Yokohama, Kanagawa 2358522, Japan
关键词
aluminum; barrier metal; chemical mechanical polishing (CMP); crystal orientation; CVD; damascene; high-k gate dielectric; metal gate; process-damage; S-factor; sputter; Ta2O5; threshold voltage deviation; TiN; tungsten; work function;
D O I
10.1109/16.936569
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
The metal gate work function deviation (crystal orientation deviation) was found to cause the threshold voltage deviation (DeltaV(th)) in the damascene metal gate transistors, When the TiN work function (crystal orientation) is controlled by using the inorganic CVD technique, DeltaV(th) Of the surface channel damascene metal gate (Al/TiN or W/TiN) transistors was drastically improved and found to be smaller than that for the conventional polysilicon gate transistors. The reason for the further reduction of the threshold voltage deviation (DeltaV(th)) in the damascene metal gate transistors is considered to be that the thermal-damages and plasma-damages on gate and gate oxide are minimized in the damascene gate process. High performance sub-100 nm metal oxide semiconductor field effect transistors (MOSFETs with work-function-controlled CVD-TIN metal-gate and Ta2O5 gate insulator are demonstrated in order to confirm the compatibility with high-k gate dielectrics and the technical advantages of the inorganc CVD-TiN.
引用
收藏
页码:1604 / 1611
页数:8
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