High-performance carbon nanotube network transistors for logic applications

We report on the fabrication of carbon nanotube network field effect transistors, in which a submonolayer network is selectively and uniformly dispersed in the active region with individually addressable back gate. The high current on/off ratio (10(4)) and good device-to-device uniformity were achieved by selective burnout of metallic pathways. The enhanced capacitive coupling between the gate and nanotube network reduces the subthreshold slope down to 180 mV/dec. The effective local gating allows us to implement logic circuits, such as an inverter and the two most important universal NOR and NAND gates. (C) American Institute of Physics.