High aspect ratio vertical through-vias for 3D MEMS packaging applications by optimized three-step deep RIE

被引:39
作者
Dixit, Pradeep [1 ,2 ]
Miao, Jianmin [1 ]
机构
[1] Nanyang Technol Univ, Sch Mech & Aerosp Engn, Micromachines Ctr, Singapore 639798, Singapore
[2] Georgia Inst Technol, Microsyst Packaging Res Ctr, Atlanta, GA 30332 USA
关键词
D O I
10.1149/1.2814081
中图分类号
O646 [电化学、电解、磁化学];
学科分类号
081704 [应用化学];
摘要
This paper reports the etching of high aspect ratio (>30), vertical through-vias having an opening dimension as small as 10 mu m, by a simple, three-step deep reactive ion etching (RIE) technique. Effects of individual etching parameter on the etching profile were demonstrated and then these parameters were optimized to achieve vertical and smooth sidewalls. Effect of platen power on controlling the perpendicularity of through-vias was found to be more dominant than other etching parameters. These optimized etching parameters were used to create through-vias; however, it was found that the etching profile remained vertical up to a certain depth and started tapering after that. To maintain this vertical etching profile at higher etch rate, higher plasma energy was required, which was provided by increasing the platen power in three steps. Three different platen powers (i.e., 12, 14, and 16 W) were used for different etching durations. A 200 nm aluminum layer was used as an antinotching layer to prevent the lateral etching of vias at the bonding interface and enhanced the vertical etched profile even in the case of over etching. The scanning electron microscope showed that the etching profile was completely vertical even at an etching depth as large as 510 mu m. High aspect ratio interconnects were fabricated by the void-free copper electrodeposition, which will be utilized in the three-dimensional (3D) microelectromechnical systems (MEMS) packaging applications. (c) 2007 The Electrochemical Society.
引用
收藏
页码:H85 / H91
页数:7
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