IC compatible planar inductors on silicon

被引:25
作者
Ronkainen, H
Kattelus, H
Tarvainen, E
Riihisaari, T
Andersson, M
Kuivalainen, P
机构
[1] VTT Elect, FIN-02044 VTT, Finland
[2] Nokia Res Ctr, FIN-00211 Helsinki, Finland
[3] Helsinki Univ Technol, Electron Phys Lab, FIN-02150 Espoo, Finland
[4] VTT Elect, Espoo 02150, Finland
来源
IEE PROCEEDINGS-CIRCUITS DEVICES AND SYSTEMS | 1997年 / 144卷 / 01期
关键词
planar inductors; BiCMOS technology; modelling;
D O I
10.1049/ip-cds:19970748
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
The authors present a systematic study of the modelling, design, and fabrication of planar spiral inductors implemented in a high speed 0.8 mu m BICMOS technology, and characterised for use in portable VHF applications. Both a fully empirical distributed equivalent circuit model and a more accurate semiempirical model for the integrated inductors have been developed and tested. The latter broadband model is scalable and thus applicable also for inductor design. The IC compatible inductors on silicon were fabricated using a process featuring oxide isolation and two layers of metal. For comparison, some test inductors were also fabricated using nonstandard techniques such as 4 mu m thick oxides and 4 mu m thick Al metallisation. The rectangular spiral inductors showed larger Q values than the octagonal ones. The largest Q value measured was 16. As expected, this value was obtained by using a combination of thick oxide and thick metallisation. The results are encouraging for the use of integrated inductors in silicon RF ICs in the GHz frequency range.
引用
收藏
页码:29 / 35
页数:7
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