Suppression of DC bias stress-induced degradation of organic field-effect transistors using postannealing effects

We fabricate pentacene field-effect transistors (FETs) showing a very small degradation in performance under a continuous DC bias stress. Pentacene FETs are manufactured on polyimide films with polyimide gate dielectric layers, and then encapsulated by poly-chloro-para-xylylene passivation layers, resulting in very flexible and heat-resistant devices. When such devices are annealed at 140 degrees C for 12 h in a nitrogen environment, the change in their source-drain current is 3 +/- 1% even after the application of continuous DC voltage biases of V-DS=V-GS=-40 V for 11 h. Furthermore, their mobility is increased by postannealing effects from 0.27 cm(2)/V sto 0.36 cm(2)/V s and their on/off ratio is also increased from 10(3) to 10(6). (C) 2005 American Institute of Physics.