Impact of oxygen vacancies on high-κ gate stack engineering

被引:49
作者
Takeuchi, H [1 ]
Wong, HY [1 ]
Ha, DW [1 ]
King, TJ [1 ]
机构
[1] Univ Calif Berkeley, Dept Elect Engn & Comp Sci, Berkeley, CA 94720 USA
来源
IEEE INTERNATIONAL ELECTRON DEVICES MEETING 2004, TECHNICAL DIGEST | 2004年
关键词
D O I
10.1109/IEDM.2004.1419305
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
The impact of oxygen vacancies in Hf-based gate dielectrics is discussed. Generation of oxygen vacancies in HfO2 is thermodynamically driven and causes Si interfacial layer formation and gate Fermi-level pinning in MOS devices. Hence, it is necessary to prevent oxygen transport across both top and bottom gate-dielectric interfaces through careful design of material system and thermal processing steps.
引用
收藏
页码:829 / 832
页数:4
相关论文
共 23 条
[1]  
[Anonymous], 2003, CRC HDB PHYS CHEM
[2]  
Chui CO, 2002, IEEE ELECTR DEVICE L, V23, P473, DOI [10.1109/LED.2002.801319, 10.1009/LED.2002.801319]
[3]   Compatibility of polycrystalline silicon gate deposition with HfO2 and Al2O3/HfO2 gate dielectrics [J].
Gilmer, DC ;
Hegde, R ;
Cotton, R ;
Garcia, R ;
Dhandapani, V ;
Triyoso, D ;
Roan, D ;
Franke, A ;
Rai, R ;
Prabhu, L ;
Hobbs, C ;
Grant, JM ;
La, L ;
Samavedam, S ;
Taylor, B ;
Tseng, H ;
Tobin, P .
APPLIED PHYSICS LETTERS, 2002, 81 (07) :1288-1290
[4]   Specific structural factors influencing on reliability of CVD-HfO2 [J].
Harada, Y ;
Niwa, M ;
Lee, SJ ;
Kwong, DL .
2002 SYMPOSIUM ON VLSI TECHNOLOGY, DIGEST OF TECHNICAL PAPERS, 2002, :26-27
[5]   Fermi-level pinning at the polysilicon/metal oxide interface - Part I [J].
Hobbs, CC ;
Fonseca, LRC ;
Knizhnik, A ;
Dhandapani, V ;
Samavedam, SB ;
Taylor, WJ ;
Grant, JM ;
Dip, LG ;
Triyoso, DH ;
Hegde, RI ;
Gilmer, DC ;
Garcia, R ;
Roan, D ;
Lovejoy, ML ;
Rai, RS ;
Hebert, EA ;
Tseng, HH ;
Anderson, SGH ;
White, BE ;
Tobin, PJ .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 2004, 51 (06) :971-977
[6]   Thermodynamic stability of binary oxides in contact with silicon [J].
Hubbard, KJ ;
Schlom, DG .
JOURNAL OF MATERIALS RESEARCH, 1996, 11 (11) :2757-2776
[7]   MOSFET devices with polysilicon on single-layer HfO2 high-k dielectrics [J].
Kang, LG ;
Onishi, K ;
Jeon, YJ ;
Lee, BH ;
Kang, CS ;
Qi, WJ ;
Nieh, R ;
Gopalan, S ;
Choi, R ;
Lee, JC .
INTERNATIONAL ELECTRON DEVICES MEETING 2000, TECHNICAL DIGEST, 2000, :35-38
[8]   Origin of the threshold voltage instability in SiO2/HfO2 dual layer gate dielectrics [J].
Kerber, A ;
Cartier, E ;
Pantisano, L ;
Degraeve, R ;
Kauerauf, T ;
Kim, Y ;
Hou, A ;
Groeseneken, G ;
Maes, HE ;
Schwalke, U .
IEEE ELECTRON DEVICE LETTERS, 2003, 24 (02) :87-89
[9]   Effects of crystallization on the electrical properties of ultrathin HfO2 dielectrics grown by atomic layer deposition [J].
Kim, H ;
McIntyre, PC ;
Saraswat, KC .
APPLIED PHYSICS LETTERS, 2003, 82 (01) :106-108
[10]   High quality ultra thin CVD HfO2 gate stack with poly-Si gate electrode [J].
Lee, SJ ;
Luan, HF ;
Bai, WP ;
Lee, CH ;
Jeon, TS ;
Senzaki, Y ;
Roberts, D ;
Kwong, DL .
INTERNATIONAL ELECTRON DEVICES MEETING 2000, TECHNICAL DIGEST, 2000, :31-34