Interface control of high-k gate dielectrics on Ge

被引：57

作者：

Caymax, M. ^{[1
]}

Houssa, M. ^{[1
]}

Pourtois, G. ^{[1
]}

Bellenger, F. ^{[1
]}

Martens, K. ^{[1
]}

Delabie, A. ^{[1
]}

Van Elshocht, S. ^{[1
]}

机构：

[1] IMEC, B-3001 Louvain, Belgium

来源：

APPLIED SURFACE SCIENCE | 2008年 / 254卷 / 19期

关键词：

Ge MOSFET; high-k gate stack; first-principles modeling;

D O I：

10.1016/j.apsusc.2008.02.134

中图分类号：

O64 [物理化学（理论化学）、化学物理学];

学科分类号：

070304 ; 081704 ;

摘要：

Important progress has been made in the passivation of Ge/gate dielectric interfaces. One important approach is by thermally oxidized GeO2 interface and ALD high-k layers, with an interface state density D-it similar to 2 x 10(11) cm(2) eV(1). Another approach is with an epi-Si/SiO2 interface, resulting in similar Dit. Hysteresis and V-th shift, however, are still not optimal. Extensive material characterization and theoretical insights help us understanding the root cause of these remaining issues and show the way to improved interface control. (c) 2008 Elsevier B.V. All rights reserved.

引用

收藏

页码：6094 / 6099

页数：6

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