Efficiency comparison between doubler and Dickson charge pumps

被引：24

作者：

Baderna, D ^{[1
]}

Cabrini, A ^{[1
]}

Torelli, G ^{[1
]}

Pasotti, M ^{[1
]}

机构：

[1] Univ Pavia, Dept Elect, I-27100 Pavia, Italy

来源：

2005 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), VOLS 1-6, CONFERENCE PROCEEDINGS | 2005年

关键词：

D O I：

10.1109/ISCAS.2005.1464981

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This paper presents a comparison between two of the most popular charge pump structures: the Dickson charge pump and the cascade of voltage doublers. The comparison has been carried out considering the power efficiency as the main parameter of interest. The discussion is supported by theoretical analysis and experimental results. To compare the two topologies, two voltage elevators were designed and integrated in a triple-well 0.18-mu m CMOS technology. The two charge pumps were designed with the same operating clock frequency, the same storage capacitance per stage, and the same number of stages (and, thus, approximately the same area). The comparison showed that the voltage doubler has a power efficiency higher by about 13%.

引用

页码：1891 / 1894

页数：4

共 5 条

[1] ON-CHIP HIGH-VOLTAGE GENERATION IN MNOS INTEGRATED-CIRCUITS USING AN IMPROVED VOLTAGE MULTIPLIER TECHNIQUE [J].