Design of a one-transistor-cell multiple-valued CAM

被引:20
作者
Hanyu, T
Kanagawa, N
Kameyama, M
机构
关键词
D O I
10.1109/JSSC.1996.542311
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A new high-density multiple-valued content-addressable memory (CAM) is proposed to perform highly parallel search operations in a limited chip area, The number of cells in the CAM is reduced by the use of multiple-valued data representation, Moreover, multiple-valued stored data correspond to the threshold voltage of a floating-gate MOS transistor, so that the cell circuit can be designed using only a single transistor. As a result, the cell area of the proposed four-valued CAM is reduced to 14% of that of a conventional dynamic binary CAM, and its performance is about 5.4-times higher than that of the corresponding binary one under a 0.8-mu m standard EEPROM technology.
引用
收藏
页码:1669 / 1674
页数:6
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