Optimization of AuGe-Ni-Au ohmic contacts for GaAs MOSFETs

被引:30
作者
Lin, HC [1 ]
Senanayake, S
Cheng, KY
Hong, M
Kwo, JR
Yang, B
Mannaerts, JP
机构
[1] Univ Illinois, Dept Elect & Comp Engn, Micro & Nanotechnol Lab, Urbana, IL 61801 USA
[2] Agere Syst, Murray Hill, NJ 07974 USA
关键词
GaAs MOSFET; ohmic contact; Taguchi method;
D O I
10.1109/TED.2003.812097
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
GaAs-based metal-oxide-semiconductor field-effect transistors (MOSFETs) are promising devices for high-speed and high-power applications. One important factor influencing the performance of a GaAs MOSFET. is the, characteristics of ohmic contacts at the drain and source terminals. In this paper, AuGe-Ni-Au metal contacts fabricated on a thin (930 Angstrom) and lightly doped (4 X 10(17) cm(-3)) n-type GaAs MOSFET channel layer were studied. The effects of controllable processing factors such as the AuGe thickness, the Ni/AuGe thickness ratio, alloy temperature, and alloy time to the characteristics of the ohmic contacts were analyzed. Contact qualities including specific contact resistance, contact uniformity, and surface morphology were optimized by controlling these processing factors. Using the optimized process Conditions, a. specific contact resistance of 5.6 X 10(-6) Omega (.) cm(2) was achieved. The deviation of contact resistance and,surface roughness were improved to 1.5% and 84 respectively. Using the improved ohmic contacts, high-performance GaAs MOSFETs (2 mum x 100 mum) with a large drain current density (350 mA/mm) and a high transconductance (90 mS/mm) were fabricated.
引用
收藏
页码:880 / 885
页数:6
相关论文
共 20 条
[1]   LOW-TEMPERATURE SINTERED AUGE/GAAS OHMIC CONTACT [J].
AINA, O ;
KATZ, W ;
BALIGA, BJ ;
ROSE, K .
JOURNAL OF APPLIED PHYSICS, 1982, 53 (01) :777-780
[2]   HIGH-POWER-DENSITY GAAS MISFETS WITH A LOW-TEMPERATURE-GROWN EPITAXIAL LAYER AS THE INSULATOR [J].
CHEN, CL ;
SMITH, FW ;
CLIFTON, BJ ;
MAHONEY, LJ ;
MANFRA, MJ ;
CALAWA, AR .
IEEE ELECTRON DEVICE LETTERS, 1991, 12 (06) :306-308
[3]   ALXGA1-XAS-GAAS METAL-OXIDE-SEMICONDUCTOR FIELD-EFFECT TRANSISTORS FORMED BY LATERAL WATER-VAPOR OXIDATION OF ALAS [J].
CHEN, EI ;
HOLONYAK, N ;
MARANOWSKI, SA .
APPLIED PHYSICS LETTERS, 1995, 66 (20) :2688-2690
[4]  
Fowlkes WY, 1995, ENG METHODS ROBUST P, P125
[5]  
HEIBLUM M, 1982, SOLID STATE ELECTRON, V25, P185, DOI 10.1016/0038-1101(82)90106-X
[6]   Low interface state density oxide-GaAs structures fabricated by in situ molecular beam epitaxy [J].
Hong, M ;
Passlack, M ;
Mannaerts, JP ;
Kwo, J ;
Chu, SNG ;
Moriya, N ;
Hou, SY ;
Fratello, VJ .
JOURNAL OF VACUUM SCIENCE & TECHNOLOGY B, 1996, 14 (03) :2297-2300
[7]  
HONG M, 1999, ENCY ELECT ELECT ENG, V19, P87
[8]   SULFIDE TREATED GAAS MISFETS WITH GATE INSULATOR OF PHOTO-CVD GROWN P3N5 FILM [J].
JEONG, YH ;
CHOI, KH ;
JO, SK .
IEEE ELECTRON DEVICE LETTERS, 1994, 15 (07) :251-253
[9]   Ga2O3(Gd2O3)/InGaAs enhancement-mode n-channel MOSFET's [J].
Ren, F ;
Kuo, JM ;
Hong, M ;
Hobson, WS ;
Lothian, JR ;
Lin, J ;
Tsai, HS ;
Mannaerts, JP ;
Kwo, J ;
Chu, SNG ;
Chen, YK ;
Cho, AY .
IEEE ELECTRON DEVICE LETTERS, 1998, 19 (08) :309-311
[10]   Enhancement-mode p-channel GaAs MOSFETs on semi-insulating substrates [J].
Ren, F ;
Hong, MW ;
Hobson, WS ;
Kuo, JM ;
Lothian, JR ;
Mannaerts, JP ;
Kwo, J ;
Chen, YK ;
Cho, AY .
IEDM - INTERNATIONAL ELECTRON DEVICES MEETING, TECHNICAL DIGEST 1996, 1996, :943-945