A Novel Hardware-Based All-Digital Phase-Locked Loop Applied to Grid-Connected Power Converters

被引:45
作者
Geng, Hua [1 ]
Xu, Dewei [2 ]
Wu, Bian [2 ]
机构
[1] Tsinghua Univ, Dept Automat, Beijing 100084, Peoples R China
[2] Ryerson Univ, Dept Elect & Comp Engn, Toronto, ON M5B 2K3, Canada
关键词
All-digital phase-locked loop (ADPLL); grid-connected power converters; positive- and negative-sequence separation; SYNCHRONIZATION; SYSTEMS;
D O I
10.1109/TIE.2010.2053338
中图分类号
TP [自动化技术、计算机技术];
学科分类号
080201 [机械制造及其自动化];
摘要
For grid-connected power converters, the frequency and phase angle of the grid voltage, which are essential to the system operations, must be quickly and accurately obtained even if the utility voltage is distorted or unbalanced. In this paper, a novel hardware-based all-digital phase-locked loop (ADPLL) is proposed for grid interface converters to detect the frequency and phase angle based on the voltage zero crossings. The proposed ADPLL features wide track-in range and fast pull-in time, and it can easily be integrated with the digital controller for grid-connected power converters. A discrete small-signal model is presented to investigate the performance and parameter dependence of the ADPLL. As expected, the output phase error and pulse jitter are minimized by selecting a high clock frequency and proper regulator parameters. With additional voltage sensors, the ADPLL can be readily extended into applications with grid disturbances. Experimental results verify the analysis and the effectiveness of the ADPLL.
引用
收藏
页码:1737 / 1745
页数:9
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