A transimpedance amplifier using a novel current mode feedback loop

被引:35
作者
Jarron, P
Anghinolfi, F
Delagne, E
Dabrowski, W
Scharfetter, L
机构
[1] FAC PHYS & NUCL TECHNIQUES,KRAKOW,POLAND
[2] CEA,DAPNIA,SACLAY,FRANCE
关键词
D O I
10.1016/0168-9002(95)01454-3
中图分类号
TH7 [仪器、仪表];
学科分类号
0804 ; 080401 ; 081102 ;
摘要
We present a transimpedance amplifier stage based on a novel current mode feedback topology. This circuit employs exclusively NMOS and PMOS transistors and requires no capacitor to stabilize the transimpedance loop and no resistor for the transresistance feedback and transistor loading. This amplifier circuit is fully compatible with submicron digital CMOS processes. The active feedback network consists of two grounded gate MOS devices which split the output current in the feedback branch and the output branch. The transresistance and the phase margin are adjustable via external DC signals. The measured rise time of the impulse response of the amplifier implemented in an industrial 0.7 mu m CMOS process is 18 ns for a transresistance of 180 k Omega and 30 ns for a transresistance of 560 k Omega. The measured Equivalent Noise Charge (ENC) is 800 rms e(-) for an input capacitance of 20 pF with the transresistance adjusted to 560 k Omega.
引用
收藏
页码:435 / 439
页数:5
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