Synthesis and device applications of high-density aligned carbon nanotubes using low-pressure chemical vapor deposition and stacked multiple transfer

被引:76
作者
Wang, Chuan [1 ]
Ryu, Koungmin [1 ]
De Arco, Lewis Gomez [1 ]
Badmaev, Alexander [1 ]
Zhang, Jialu [1 ]
Lin, Xue [1 ]
Che, Yuchi [1 ]
Zhou, Chongwu [1 ]
机构
[1] Univ So Calif, Ming Hsieh Dept Elect Engn, Los Angeles, CA 90089 USA
基金
美国国家科学基金会;
关键词
Aligned carbon nanotubes; chemical vapor deposition; high-density; high performance transistors; HIGH-FREQUENCY PERFORMANCE; SINGLE; ARRAYS; ELECTRONICS; GROWTH; LOGIC; CIRCUITS; SCALE;
D O I
10.1007/s12274-010-0054-0
中图分类号
O64 [物理化学(理论化学)、化学物理学];
学科分类号
070304 ; 081704 ;
摘要
For nanotube-based electronics to become a viable alternative to silicon technology, high-density aligned carbon nanotubes are essential. In this paper, we report the combined use of low-pressure chemical vapor deposition and stacked multiple transfer to achieve high-density aligned nanotubes. By using an optimized nanotube synthesis recipe, we have achieved high-density aligned carbon nanotubes with density as high as 30 tubes/mu m. In addition, a facile stacked multiple transfer technique has been developed to further increase the nanotube density to 55 tubes/mu m. Furthermore, high-performance submicron carbon nanotube field-effect transistors have been fabricated on the high-density aligned nanotubes. Before removing the metallic nanotubes by electrical breakdown, the devices exhibit on-current density of 92.4 mu A/mu m and normalized transconductance of 13.3 mu S/mu m. Moreover, benchmarking with the aligned carbon nanotube transistors in the literature indicates that our devices exhibit the best performance so far, which is attributed to both the increased nanotube density and scaling down of channel length. This study shows the great potential of using such high-density aligned nanotubes for high performance nanoelectronics and analog/RF applications.
引用
收藏
页码:831 / 842
页数:12
相关论文
共 36 条
[1]  
Amlani I, 2006, IEEE INT EL DEV M IE, P559
[2]   Logic circuits with carbon nanotube transistors [J].
Bachtold, A ;
Hadley, P ;
Nakanishi, T ;
Dekker, C .
SCIENCE, 2001, 294 (5545) :1317-1320
[3]   Single-electron transport in ropes of carbon nanotubes [J].
Bockrath, M ;
Cobden, DH ;
McEuen, PL ;
Chopra, NG ;
Zettl, A ;
Thess, A ;
Smalley, RE .
SCIENCE, 1997, 275 (5308) :1922-1925
[4]   Gate capacitance coupling of singled-walled carbon nanotube thin-film transistors [J].
Cao, Qing ;
Xia, Minggang ;
Kocabas, Coskun ;
Shim, Moonsub ;
Rogers, John A. ;
Rotkin, Slava V. .
APPLIED PHYSICS LETTERS, 2007, 90 (02)
[5]   An integrated logic circuit assembled on a single carbon nanotube [J].
Chen, ZH ;
Appenzeller, J ;
Lin, YM ;
Sippel-Oakley, J ;
Rinzler, AG ;
Tang, JY ;
Wind, SJ ;
Solomon, PM ;
Avouris, P .
SCIENCE, 2006, 311 (5768) :1735-1735
[6]   Carbon nanotube inter- and intramolecular logic gates [J].
Derycke, V ;
Martel, R ;
Appenzeller, J ;
Avouris, P .
NANO LETTERS, 2001, 1 (09) :453-456
[7]   Growth of high-density parallel arrays of long single-walled carbon nanotubes on quartz substrates [J].
Ding, Lei ;
Yuan, Dongning ;
Liu, Jie .
JOURNAL OF THE AMERICAN CHEMICAL SOCIETY, 2008, 130 (16) :5428-+
[8]   Selective Growth of Well-Aligned Semiconducting Single-Walled Carbon Nanotubes [J].
Ding, Lei ;
Tselev, Alexander ;
Wang, Jinyong ;
Yuan, Dongning ;
Chu, Haibin ;
McNicholas, Thomas P. ;
Li, Yan ;
Liu, Jie .
NANO LETTERS, 2009, 9 (02) :800-805
[9]   Assessment of high-frequency performance potential of carbon nanotube transistors [J].
Guo, J ;
Hasan, S ;
Javey, A ;
Bosman, G ;
Lundstrom, M .
IEEE TRANSACTIONS ON NANOTECHNOLOGY, 2005, 4 (06) :715-721
[10]   Template-free directional growth of single-walled carbon nanotubes on a- and r-plane sapphire [J].
Han, S ;
Liu, XL ;
Zhou, CW .
JOURNAL OF THE AMERICAN CHEMICAL SOCIETY, 2005, 127 (15) :5294-5295