A simulation approach to optimize the electrical parameters of a vertical tunnel FET

被引：108

作者：

Bhuwalka, KK ^{[1
]}

Schulze, J ^{[1
]}

Eisele, I ^{[1
]}

机构：

[1] Univ German Federal Armed Forces, Inst Phys, D-85577 Munich, Germany

来源：

IEEE TRANSACTIONS ON ELECTRON DEVICES | 2005年 / 52卷 / 07期

关键词：

band-to-band tunneling; gated p-i-n diode; heterostructure; Kane's model; SiGe; subthreshold swing; surface tunneling FET; threshold-voltage; vertical tunnel field-effect transistor; Zener tunneling;

D O I：

10.1109/TED.2005.850618

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Using two-dimensional device simulations, the electrical parameters of gated tunnel field-effect transistor (FET) are optimized with a SiGe delta doped layer in the source region. In order to prove the validity of the simulation models we compare simulation results with the experimentally realized tunnel FET on silicon and show that it gives a good match. It is shown that the incorporation of pseudomorphic strained-Si1-xGex layers leads to a significant performance increase. Furthermore, it becomes evident that the improvements are not a direct consequence of bandgap lowering but rather an indirect consequence of tunnel barrier width lowering. This leads to an asymmetry in the n- and the p-channel performance.

引用

页码：1541 / 1547

页数：7

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