High density and low power design of MRAM

被引：15

作者：

Hung, CC ^{[1
]}

Kao, AJ ^{[1
]}

Chen, YS ^{[1
]}

Wang, YH ^{[1
]}

Hsu, HH ^{[1
]}

Chen, CA ^{[1
]}

Lee, YJ ^{[1
]}

Chen, WC ^{[1
]}

Lee, JY ^{[1
]}

Chen, WS ^{[1
]}

Lin, WC ^{[1
]}

Shen, KH ^{[1
]}

Wei, JH ^{[1
]}

Wang, LC ^{[1
]}

Chen, KL ^{[1
]}

Chao, S ^{[1
]}

Tang, DD ^{[1
]}

Tsai, M ^{[1
]}

机构：

[1] ERSO, ITRI, Hsinchu, Taiwan

来源：

IEEE INTERNATIONAL ELECTRON DEVICES MEETING 2004, TECHNICAL DIGEST | 2004年

关键词：

D O I：

10.1109/IEDM.2004.1419225

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Novel MRAM structures based on lT2UMTJ cell and PWWL architecture are proposed to shrink the bit size with a potential down to 6 F-2 by a so-called ExtVia process and reduce the writing current by a factor of two, combined with the nature of non-volatility and high speed, making the MRAM suitable for universal memory applications.

引用

页码：575 / 578

页数：4

共 6 条

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