Engineering gap fill, microstructure and film composition of electroplated copper for on-chip metallization

被引：17

作者：

Dubin, VM ^{[1
]}

Thomas, CD ^{[1
]}

Baxter, N ^{[1
]}

Block, C ^{[1
]}

Chikarmane, V ^{[1
]}

McGregor, P ^{[1
]}

Jentz, D ^{[1
]}

Hong, K ^{[1
]}

Hearne, S ^{[1
]}

Zhi, C ^{[1
]}

Zierath, D ^{[1
]}

Miner, B ^{[1
]}

Kuhn, M ^{[1
]}

Budrevich, A ^{[1
]}

Simka, H ^{[1
]}

Shankar, S ^{[1
]}

机构：

[1] Intel Corp, Portland Technol Dev, Hillsboro, OR 97124 USA

来源：

PROCEEDINGS OF THE IEEE 2001 INTERNATIONAL INTERCONNECT TECHNOLOGY CONFERENCE | 2001年

关键词：

D O I：

10.1109/IITC.2001.930081

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Electroplated Cu is being used by the major semiconductor manufacturers as an interconnect material, because it offers a lower line resistance and better electromigration performance over conventional Al metallization. This paper describes the mechanism of "super-fill" as well as gap fill, microstructure, and film composition of electroplated copper. A combination of optimized Cu plating additive chemistry and current waveform enable complete gap fill of 0.07 - 0.1 mum features (AR > 10:1) as well as strong (111) texture, large grains (> 3 mum) with a large fraction of twin grain boundaries and controlled impurities content in electroplated Cu films. Electroplating process stability was maintained through the on-line analysis (p/t <0.3) of organic and inorganic bath ingredients and their replenishment.

引用

页码：271 / 273

页数：3

共 3 条

[1]

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