Hole trap generation in the gate oxide due to plasma-induced charging

被引：8

作者：

Brozek, T ^{[1
]}

Chan, YD ^{[1
]}

Viswanathan, CR ^{[1
]}

机构：

[1] SEMATECH,AUSTIN,TX 78741

来源：

IEEE ELECTRON DEVICE LETTERS | 1996年 / 17卷 / 09期

关键词：

D O I：

10.1109/55.536286

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

The paper presents results of hole trapping studies in thin gate oxide of plasma damaged MOS transistors. Process-induced damage was investigated with antenna test structures to enhance the effect of plasma charging, In addition to neutral electron traps and passivated interface damage, which are commonly observed plasma charging latent damage, we observed and identified hole traps, generated bg: plasma stress, The amount of hole traps increases with increasing antenna ratio, indicating that the mechanism of hole trap generation is based on electrical stress and current flow, forced through the oxide during plasma etching, The density of hole traps in the most damaged devices was found to be larger than that in reference, undamaged devices by about 100%.

引用

页码：440 / 442

页数：3

共 15 条

[1]

Brozek T, 1996, APPL PHYS LETT, V68, P1826, DOI 10.1063/1.116026

[2] A MODEL FOR THRESHOLD VOLTAGE SHIFT UNDER POSITIVE AND NEGATIVE-HIGH-FIELD ELECTRON INJECTION IN COMPLEMENTARY METAL-OXIDE-SEMICONDUCTOR (CMOS) TRANSISTORS [J].