Novel corner rounding process for Shallow Trench Isolation utilizing MSTS (Micro-Structure Transformation of Silicon)

被引：40

作者：

Matsuda, S ^{[1
]}

Sato, T ^{[1
]}

Yoshimura, H ^{[1
]}

Takegawa, Y ^{[1
]}

Sudo, A ^{[1
]}

Mizushima, I ^{[1
]}

Tsunashima, Y ^{[1
]}

Toyoshima, Y ^{[1
]}

机构：

[1] Toshiba Co Ltd, Microelect Engn Lab, Isogo Ku, Yokohama, Kanagawa 2358522, Japan

来源：

INTERNATIONAL ELECTRON DEVICES MEETING 1998 - TECHNICAL DIGEST | 1998年

关键词：

D O I：

10.1109/IEDM.1998.746298

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A new STI (Shallow Trench Isolation) earner rounding technique with MSTS (Micro-Structure Transformation of Silicon) which utilizes Si-migration phenomenon with hydrogen ambient annealing [1] is proposed and applied to 0.15 mu m CMOS technology. Highly controlled corner rounding radius is achieved without high temperature oxidation process. Thus it is free from defect generation and undesirable impurity diffusion in Si substrate. Subthreshold current due to parasitic corner transistors of the STI structure is effectively suppressed and the reverse narrow channel effect is controlled down to 0.2 pm channel width.

引用

页码：137 / 140

页数：4

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