Noise and speed characteristics of test transistors and charge amplifiers designed using a submicron CMOS technology

The analog characteristics of the industrial MIETEC 0.7 mu m CMOS process have been measured using test transistors and a charge amplifier based on an Operational Transconductance Amplifier. The test transistors have been built with an aspect ratio W/L = 7000/1 and tested in saturation at a drain current of 400 mu A. In these conditions the 1/f corner noise frequency of the p-channel was measured at 2.5 kHz. A charge amplifier has been designed with an input p-channel transistor of 3500 mu m(2) gate area. At a drain current of 400 mu A, the noise measurements of the charge amplifier in ENC was 470 e(-) rms at 0 pF external capacitance, with a slope of 12 e(-) rms per pF, for a peaking time of 500 ns made by a CR-RC(2) filter. The output risetime was 13 ns at 0 pF. This promising mixed-mode technology enables the development of charge amplifiers and more complex analog circuits that can approach the noise performance of designs built with JFET transistors.