Sub-quarter micron Si-gate CMOS with ZrO2 gate dielectric

被引：16

作者：

Hobbs, C ^{[1
]}

Dip, L ^{[1
]}

Reid, K ^{[1
]}

Gilmer, D ^{[1
]}

Hegde, R ^{[1
]}

Ma, T ^{[1
]}

Taylor, B ^{[1
]}

Cheng, B ^{[1
]}

Samavedam, S ^{[1
]}

Tseng, H ^{[1
]}

Weddington, D ^{[1
]}

Huang, F ^{[1
]}

Farber, D ^{[1
]}

Schippers, M ^{[1
]}

Rendon, M ^{[1
]}

Prabhu, L ^{[1
]}

Rai, R ^{[1
]}

Bagchi, S ^{[1
]}

Conner, J ^{[1
]}

Backer, S ^{[1
]}

Dumbuya, F ^{[1
]}

Locke, J ^{[1
]}

Workman, D ^{[1
]}

Tobin, P ^{[1
]}

机构：

[1] Motorola Inc, Digital DNA Labs, APRDL, Austin, TX USA

来源：

2001 INTERNATIONAL SYMPOSIUM ON VLSI TECHNOLOGY, SYSTEMS, AND APPLICATIONS, PROCEEDINGS OF TECHNICAL PAPERS | 2001年

关键词：

D O I：

10.1109/VTSA.2001.934520

中图分类号：

TP [自动化技术、计算机技术];

学科分类号：

0812 ;

摘要：

MOSFETs with a zirconium dioxide (ZrO2) gate dielectric and poly-silicon gate were fabricated using a low temperature CMOS process. Well-behaved transistor characteristics were obtained for devices with sizes of 14 mum x 1.4 mum or smaller. Devices 14 mum x 14 mum or larger were found to be nonfunctional due to the formation of Zr-silicide at the polySi-gate/ZrO2 interface. In this paper, we present results on the electrical and physical characterization.

引用

页码：204 / 207

页数：4

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