A 16-Mb MRAM featuring bootstrapped write drivers

被引：31

作者：

Gogl, D ^{[1
]}

Arndt, C ^{[1
]}

Barwin, JC ^{[1
]}

Bette, A ^{[1
]}

DeBrosse, J ^{[1
]}

Gow, E ^{[1
]}

Hoenigschmid, H ^{[1
]}

Lammers, S ^{[1
]}

Lamorey, M ^{[1
]}

Lu, Y ^{[1
]}

Maffitt, T ^{[1
]}

Maloney, K ^{[1
]}

Obermaier, W ^{[1
]}

Sturm, A ^{[1
]}

Viehmann, H ^{[1
]}

Willmott, D ^{[1
]}

Wood, M ^{[1
]}

Gallagher, WJ ^{[1
]}

Mueller, G ^{[1
]}

Sitaram, AR ^{[1
]}

机构：

[1] IBM Infineon MRAM Dev Alliance MDA, Hopewell Jct, NY 12533 USA

来源：

IEEE JOURNAL OF SOLID-STATE CIRCUITS | 2005年 / 40卷 / 04期

关键词：

16; Mb; 1T1MTJ; architecture; bootstrap; cell; driver; memory; MRAM;

D O I：

10.1109/JSSC.2004.842856

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A 16-Mb magnetic random access memory (MRAM) is demonstrated in 0.18-mu m three-Cu-level CMOS with a three-level MRAM process adder. The chip, the highest density MRAM reported to date, utilizes a 1.42 mu m(2) 1-transistor 1-magnetic tunnel junction (1T1MTJ) cell, measures 79 mm(2) and features a x 16 asynchronous SRAM-like interface. The paper describes the cell, architecture, and circuit techniques unique to multi-Mb MRAM design, including a novel bootstrapped write driver circuit. Hardware results are presented.

引用

页码：902 / 908

页数：7

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