A high-speed 128Kbit MRAM core for future universal memory applications

被引：19

作者：

Bette, A ^{[1
]}

DeBrosse, J ^{[1
]}

Gogl, D ^{[1
]}

Hoenigschmid, H ^{[1
]}

Robertazzi, R ^{[1
]}

Arndt, C ^{[1
]}

Braun, D ^{[1
]}

Casarotto, D ^{[1
]}

Havreluk, R ^{[1
]}

Lammers, S ^{[1
]}

Obermaier, W ^{[1
]}

Reohr, W ^{[1
]}

Viehmann, H ^{[1
]}

Gallagher, WJ ^{[1
]}

Müller, G ^{[1
]}

机构：

[1] IBM Corp, Semicond Res & Dev Ctr, IBM Infineon Technol, MRAM Dev Alliance, Hopewell Jct, NY 12533 USA

来源：

2003 SYMPOSIUM ON VLSI CIRCUITS, DIGEST OF TECHNICAL PAPERS | 2003年

关键词：

1T1MTJ; MRAM; access time; universal memory; symmetrical sensing; reference cell;

D O I：

10.1109/VLSIC.2003.1221207

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

A 128Kb MRAM (Magnetic Random Access Memory) test chip has been fabricated utilizing for the first time a 0.18mum, VDD = 1.8V, logic process technology with Cu backend of line. The presented design uses a 1.4mum(2) 1T1MTJ (1-Transistor/1-Magnetic Tunnel Junction) cell and features a symmetrical high-speed sensing architecture using complementary reference cells and configurable load devices. Extrapolations from test chip measurements and circuit assessments predict a 5ns random array read access time and random write operations with <5ns write pulse width.

引用

页码：217 / 220

页数：4

共 4 条

[1] A low power 1Mbit MRAM based on 1T1MTJ bit cell integrated with Copper Interconnects [J].

Durlam, M ;

Naji, P ;

Omair, A ;

DeHerrera, M ;

Calder, J ;

Slaughter, JM ;

Engel, B ;

Rizzo, N ;

Grynkewich, G ;

Butcher, B ;

Tracy, C ;

Smith, K ;

Kyler, K ;

Ren, J ;

Molla, J ;

Feil, B ;

Williams, R ;

Tehrani, S .

2002 SYMPOSIUM ON VLSI CIRCUITS, DIGEST OF TECHNICAL PAPERS, 2002, :158-161

[2]

Jeong HS, 2002, INTERNATIONAL ELECTRON DEVICES 2002 MEETING, TECHNICAL DIGEST, P551, DOI 10.1109/IEDM.2002.1175901

[3] High-performance MRAM technology with an improved magnetic tunnel junction material [J].

Motoyoshi, M ;

Moriyama, K ;

Mori, R ;

Fukumoto, C ;

Itoh, R ;

Kano, R ;

Bessho, K ;

Narisawa, H .

2002 SYMPOSIUM ON VLSI TECHNOLOGY, DIGEST OF TECHNICAL PAPERS, 2002, :212-213

[4] Memories of tomorrow [J].

Reohr, W ;

Honigschmid, H ;

Robertazzi, R ;

Gogl, D ;

Pesavento, F ;

Lammers, S ;

Lewis, K ;

Arndt, C ;

Lu, Y ;

Viehmann, H ;

Scheuerlein, R ;

Wang, LK ;

Trouilloud, P ;

Parkin, S ;

Gallagher, W ;

Müller, G .

IEEE CIRCUITS & DEVICES, 2002, 18 (05) :17-27

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