Transient-Voltage-Clamp Circuit Design Based on Constant Load Line Impedance for Voltage Regulator Module

被引:16
作者
Lim, Sungkeun [1 ]
Fan, Jiwei [1 ]
Huang, Alex Q. [1 ]
机构
[1] N Carolina State Univ, Raleigh, NC 27695 USA
关键词
DC-DC converter; fast transient response; transient-voltage-clamp (TVC) circuit; voltage regulator (VR) module (VRM); SLEW-RATE LOAD; CONTROLLERS; INDUCTANCE;
D O I
10.1109/TIE.2010.2042419
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
A transient-voltage-clamp (TVC) circuit acts as a replacement of bulk capacitors, which is required for voltage regulator (VR) module (VRM) to clamp output voltage spikes. With the TVC circuit, VRM size is greatly reduced with similar transient performance. This paper presents a new TVC circuit. This TVC circuit is designed based on the constant load line impedance which is recently given by Intel's VRM11.0. The TVC circuit works in parallel with VR decoupling capacitors to achieve faster voltage regulation. The impedances of the VR, output capacitors, and the proposed TVC circuit are analyzed. The TVC circuit design procedure is described, and the transient performance and power consumption are discussed. The theoretical analysis is verified by simulation results. Moreover, the proposed TVC circuit is fabricated with a 0.6-mu m CMOS process, and experimental results verify the simulation results and theoretical analysis.
引用
收藏
页码:4085 / 4094
页数:10
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