Low-voltage, 10bit switched-current ADC with 20 MHz input bandwidth

被引：4

作者：

Jonsson, BE ^{[1
]}

Tenhunen, H

机构：

[1] Ericsson Radio Syst AB, Microelect XFE, S-16480 Stockholm, Sweden

[2] Royal Inst Technol, Elect Syst Design Lab, S-16440 Stockholm, Sweden

来源：

ELECTRONICS LETTERS | 1998年 / 34卷 / 20期

关键词：

D O I：

10.1049/el:19981386

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Fully-differential first-generation switched-current memory cells with common-mode feedforward were used to implement a 1.5 bit/stage pipelined A/D converter in a standard digital CMOS process. The peak effective number of bits (ENOB) for input frequencies over 1 MHz is 7.43, and with a 20 MHz input signal sampled at 3 M sample/s, the measured SFDR and SNDR are 45.1 and 40.8 dB, respectively.

引用

页码：1904 / 1905

页数：2

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