Plasma processing damage in etching and deposition

被引：26

作者：

Fonash, SJ ^{[1
]}

机构：

[1] Penn State Univ, Elect Mat & Proc Res Lab, University Pk, PA 16801 USA

来源：

IBM JOURNAL OF RESEARCH AND DEVELOPMENT | 1999年 / 43卷 / 1-2期

关键词：

D O I：

10.1147/rd.431.0103

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

Plasma-based etching and deposition are key processes in macroelectronics and microelectronics. The energetic species, the time-changing magnetic fields, and the fluxes inherent in these processes give them their flexibility and functionality but also their potential for process damage. The basic causes of the damage are 1) process-induced current flow and 2) direct exposure to the plasma. The impact of plasma-based etching and deposition damage is very much dependent on process flow as well as on device and circuit layout.

引用

页码：103 / 107

页数：5

共 14 条

[1] HYDROGEN AND PROCESSING DAMAGE IN CMOS DEVICE RELIABILITY - DEFECT PASSIVATION AND DEPASSIVATION DURING PLASMA EXPOSURES AND SUBSEQUENT ANNEALING [J].

AWADELKARIM, OO ;

FONASH, SJ ;

MIKULAN, PI ;

OZAITA, M ;

CHAN, YD .

MICROELECTRONIC ENGINEERING, 1995, 28 (1-4) :47-50

[2] Plasma-charging damage to gate SiO2 and SiO2/Si interfaces in submicron n-channel transistors: Latent defects and passivation/depassivation of defects by hydrogen [J].

Awadelkarim, OO ;

Fonash, SJ ;

Mikulan, PI ;

Chan, YD .

JOURNAL OF APPLIED PHYSICS, 1996, 79 (01) :517-525

[3] Soft breakdown of ultra-thin gate oxide layers [J].

Depas, M ;

Nigam, T ;

Heyns, MM .

IEEE TRANSACTIONS ON ELECTRON DEVICES, 1996, 43 (09) :1499-1504

[4] AN OVERVIEW OF DRY ETCHING DAMAGE AND CONTAMINATION EFFECTS [J].

FONASH, SJ .

JOURNAL OF THE ELECTROCHEMICAL SOCIETY, 1990, 137 (12) :3885-3892

[5]

FONASH SJ, 1994, SOLID STATE TECHNOL, V37, P99

[6] DEGRADATION OF SUBMICRON N-CHANNEL MOSFET HOT-ELECTRON RELIABILITY DUE TO EDGE DAMAGE FROM POLYSILICON GATE PLASMA-ETCHING [J].

GU, T ;

AWADELKARIM, OO ;

FONASH, SJ ;

CHAN, YD .

IEEE ELECTRON DEVICE LETTERS, 1994, 15 (10) :396-398

[7] IMPACT OF POLYSILICON DRY-ETCHING ON 0.5-MU-M NMOS TRANSISTOR PERFORMANCE - THE PRESENCE OF BOTH PLASMA BOMBARDMENT DAMAGE AND PLASMA CHARGING DAMAGE [J].

GU, T ;

OKANDAN, M ;

AWADELKARIM, OO ;

FONASH, SJ ;

REMBETSKI, JF ;

AUM, P ;

CHAN, YD .

IEEE ELECTRON DEVICE LETTERS, 1994, 15 (02) :48-50

[8] Quantum-mechanical modeling of electron tunneling current from the inversion layer of ultra-thin-oxide nMOSFET's [J].

Lo, SH ;

Buchanan, DA ;

Taur, Y ;

Wang, W .

IEEE ELECTRON DEVICE LETTERS, 1997, 18 (05) :209-211

[9] INFLUENCE OF HYDROGEN AND OXYGEN PLASMA TREATMENTS ON GRAIN-BOUNDARY DEFECTS IN POLYCRYSTALLINE SILICON [J].

NICKEL, NH ;

YIN, A ;

FONASH, SJ .

APPLIED PHYSICS LETTERS, 1994, 65 (24) :3099-3101

[10] Soft-breakdown damage in MOSFET's due to high-density plasma etching exposure [J].

Okandan, M ;

Fonash, SJ ;

Awadelkarim, OO ;

Chan, YD ;

Preuninger, F .

IEEE ELECTRON DEVICE LETTERS, 1996, 17 (08) :388-390

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