Impact of NBTI on the temporal performance degradation of digital circuits

被引：186

作者：

Paul, BC ^{[1
]}

Kang, K ^{[1
]}

Kufluoglu, H ^{[1
]}

Alam, MA ^{[1
]}

Roy, K ^{[1
]}

机构：

[1] Purdue Univ, Sch Elect & Comp Engn, W Lafayette, IN 47907 USA

来源：

IEEE ELECTRON DEVICE LETTERS | 2005年 / 26卷 / 08期

关键词：

negative bias temperature instability (NBTI); performance degradation; threshold voltage degradation;

D O I：

10.1109/LED.2005.852523

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Negative bias temperature instability (NBTI) has become one of the major causes for reliability degradation of nanoscale circuits. In this letter, we propose a simple analytical model to predict the delay degradation of a wide class of digital logic gate based on both worst case and activity dependent threshold voltage change under NBTI. We show that by knowing the threshold voltage degradation of a single transistor due to NBTI, one can predict the performance degradation of a circuit with a reasonable degree of accuracy. We find that digital circuits are much less sensitive (approximately 9.2% performance degradation in ten years for 70 nm technology) to NBTI degradation than previously anticipated.

引用

页码：560 / 562

页数：3