SiGe channel p-MOSFETs scaling-down

被引：18

作者：

Andrieu, F ^{[1
]}

Ernst, T ^{[1
]}

Romanjek, K ^{[1
]}

Weber, O ^{[1
]}

Renard, C ^{[1
]}

Hartmann, JM ^{[1
]}

Toffoli, A ^{[1
]}

Papon, AM ^{[1
]}

Truche, R ^{[1
]}

Holliger, P ^{[1
]}

Brévard, L ^{[1
]}

Ghibaudo, G ^{[1
]}

Deleonibus, S ^{[1
]}

机构：

[1] CEA, DRT, LETI, F-38054 Grenoble 9, France

来源：

ESSDERC 2003: PROCEEDINGS OF THE 33RD EUROPEAN SOLID-STATE DEVICE RESEARCH CONFERENCE | 2003年

关键词：

D O I：

10.1109/ESSDERC.2003.1256865

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

We present an in-depth experimental study of the transport in sub-100nm Si0.85Ge0.15 p-MOSFETs. Using a novel capacitive method, we have extracted the effective channel length for gate lengths down to 50nm. We show experimentally that the performances of short channel SiGe devices are limited by the low-field transport regime.

引用

页码：267 / 270

页数：4

共 18 条

[1]

Alieu J., 1998, ESSDERC'98. Proceedings of the 28th European Solid-State Device Research Conference, P144

[2] Study of velocity field characteristics in pseudomorphic Si0.8Ge0.2 p-channel metal-oxide-semiconductor field effect transistor [J].