Voltage balancing control of diode-clamped multilevel converters with passive front-ends

被引：108

作者：

Busquets-Monge, Sergio ^{[1
]}

Alepuz, Salvador ^{[2
]}

Bordonau, Josep ^{[1
]}

Peracaula, Juan ^{[1
]}

机构：

[1] Tech Univ Catalonia, Dept Elect Engn, Barcelona 08028, Spain

[2] Tech Univ Catalonia, Mataro Sch Engn, Mataro 08303, Spain

来源：

IEEE TRANSACTIONS ON POWER ELECTRONICS | 2008年 / 23卷 / 04期

关键词：

capacitor voltage balance; diode-clamped; multilevel; pulsewidth modulation (PWM); virtual vector;

D O I：

10.1109/TPEL.2008.925182

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

In the previous literature, it has been reported that it is not possible to guarantee the balance of the dc-link capacitor voltages of multilevel three-phase diode-clamped dc-ac converters with passive front-ends for high modulation indices, especially for more than three levels. This paper proposes a novel closed-loop control approach capable of guaranteeing such balance for all operating conditions of the converters without the need for additional hardware. Three different phase duty-ratio perturbation schemes are proposed. They are compared through simulation for the case of a four-level three-phase diode-clamped dc-ac converter operated with a virtual-vector-based modulation. The most simple and effective perturbation scheme, only requiring the sensing of all dc-link capacitor voltages, is tested experimentally in the same four-level converter. The results demonstrate the feasibility of guaranteeing the dc-link capacitor voltage balance for all converter operating conditions.

引用

页码：1751 / 1758

页数：8

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