Reduced common-mode modulation strategies for cascaded multilevel inverters

被引:117
作者
Loh, PC [1 ]
Holmes, DG
Fukuta, Y
Lipo, TA
机构
[1] Nanyang Technol Univ, Ctr Adv Power Elect, Sch Elect & Elect Engn, Singapore 639798, Singapore
[2] Monash Univ, Dept Elect & Comp Syst Engn, Clayton, Vic 3800, Australia
[3] Univ Wisconsin, Dept Elect & Comp Engn, Madison, WI 53706 USA
关键词
common-mode voltages; harmonic analysis; multilevel inverters; pulsewidth modulation (PWM);
D O I
10.1109/TIA.2003.816547
中图分类号
T [工业技术];
学科分类号
08 ;
摘要
This paper presents modulation strategies for cascaded multilevel inverters that substantially eliminate common-mode voltage on the output phases. The paper begins by developing generic multilevel inverter reference waveforms that use only "allowed" space vectors to achieve reduced common-mode voltage. A graphical technique is then proposed that allows various carrier disposition modulation strategies for a diode-clamped inverter to be converted to equivalent modulation of a cascaded inverter for any fundamental reference waveform. This graphical technique is confirmed for both Alternative Phase Opposition Disposition and Phase Disposition equivalent modulation of a cascaded inverter, and is then used, to create reduced common-mode modulation strategies for cascaded inverters from their equivalent counterparts for diode-clamped inverters under both continuous and discontinuous switching conditions. The strategies have been confirmed by both simulation and experimental results obtained using a cascaded five-level inverter.
引用
收藏
页码:1386 / 1395
页数:10
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