A simple characterization method for MOS transistor matching in deep submicron technologies

被引：6

作者：

Croon, JA ^{[1
]}

Rosmeulen, M ^{[1
]}

Decoutere, S ^{[1
]}

Sansen, W ^{[1
]}

Maes, HE ^{[1
]}

机构：

[1] IMEC VZW, B-3001 Louvain, Belgium

来源：

ICMTS 2001: PROCEEDINGS OF THE 2001 INTERNATIONAL CONFERENCE ON MICROELECTRONIC TEST STRUCTURES | 2001年

关键词：

D O I：

10.1109/ICMTS.2001.928664

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A new and simple four parameter mismatch model is presented for the MOS transistor. This model is extensively tested on a 0.18 mum CMOS technology. Bulk bias dependence is modeled physically and for long channel transistors no extra parameter is needed. The repeatability of our measurement system and parameter extraction has been investigated. It is shown that for our measurement setup and test structures, measurements in the linear region are affected by contact resistance variation for devices broader than 4 mum.

引用

页码：213 / 218

页数：6

共 10 条

[1] Mismatch characterization of submicron MOS transistors [J].