Characteristics of p-channel Si nano-crystal memory

被引:32
作者
Han, K [1 ]
Kim, I
Shin, H
机构
[1] Korea Adv Inst Sci & Technol, Dept Elect Engn & Comp Sci, Taejon 305701, South Korea
[2] Hyundai Microelect Co Ltd, Memory R&D Div, Chung Ju 361725, South Korea
关键词
direct tunneling (DT); hole tunneling; nanocrystal memory; valence band electron tunneling;
D O I
10.1109/16.918234
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In this work, the feasibility of p-channel nano-crystal memory with thin oxide in direct tunneling (DT) regime is demonstrated. By comparing the programming characteristics of devices with nano-crystals and devices without nano-crystals, the role of dots as storage node is presented, The programming and erasing mechanisms of p-channel nano-crystal memory were investigated by charge separation technique. For small gate programming voltage, hole tunneling component from inversion layer is dominant. However, valence band electron tunneling component from the valence band in the nano-crystal becomes dominant for large gate voltage, In case of erasing, the electron tunneling occurs from either the conduction band or the valence band. Finally, the comparison of retention between programmed holes and electrons shows that holes have longer retention time.
引用
收藏
页码:874 / 879
页数:6
相关论文
共 9 条
[1]   Resonant tunneling through a self-assembled Si quantum dot [J].
Fukuda, M ;
Nakagawa, K ;
Miyazaki, S ;
Hirose, M .
APPLIED PHYSICS LETTERS, 1997, 70 (17) :2291-2293
[2]   Programming characteristics of P-channel Si nano-crystal memory [J].
Han, K ;
Kim, I ;
Shin, H .
IEEE ELECTRON DEVICE LETTERS, 2000, 21 (06) :313-315
[3]   Fast and long retention-time nano-crystal memory [J].
Hanafi, HI ;
Tiwari, S ;
Khan, I .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 1996, 43 (09) :1553-1558
[4]   Room temperature single electron effects in a Si nano-crystal memory [J].
Kim, I ;
Han, S ;
Han, K ;
Lee, J ;
Shin, H .
IEEE ELECTRON DEVICE LETTERS, 1999, 20 (12) :630-631
[5]   MOS memory using germanium nanocrystals formed by thermal oxidation of Si1-xGex [J].
King, YC ;
King, TJ ;
Hu, CM .
INTERNATIONAL ELECTRON DEVICES MEETING 1998 - TECHNICAL DIGEST, 1998, :115-118
[6]   Effects of traps on charge storage characteristics in metal-oxide-semiconductor memory structures based on silicon nanocrystals [J].
Shi, Y ;
Saito, K ;
Ishikuro, H ;
Hiramoto, T .
JOURNAL OF APPLIED PHYSICS, 1998, 84 (04) :2358-2360
[7]  
Tiwari S, 1995, INTERNATIONAL ELECTRON DEVICES MEETING, 1995 - IEDM TECHNICAL DIGEST, P521, DOI 10.1109/IEDM.1995.499252
[8]  
Wahl J. A., 1999, International Electron Devices Meeting 1999. Technical Digest (Cat. No.99CH36318), P375, DOI 10.1109/IEDM.1999.824173
[9]   ROOM-TEMPERATURE SINGLE-ELECTRON MEMORY [J].
YANO, K ;
ISHII, T ;
HASHIMOTO, T ;
KOBAYASHI, T ;
MURAI, F ;
SEKI, K .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 1994, 41 (09) :1628-1638