A model for single-event transients in comparators

被引：49

作者：

Johnston, AH ^{[1
]}

Swift, GM ^{[1
]}

Miyahira, TF ^{[1
]}

Edmonds, LD ^{[1
]}

机构：

[1] CALTECH, Jet Prop Lab, Pasadena, CA 91109 USA

来源：

IEEE TRANSACTIONS ON NUCLEAR SCIENCE | 2000年 / 47卷 / 06期

关键词：

D O I：

10.1109/23.903818

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A two-step modeling approach is developed for single-event transients in linear circuits that uses the PISCES device simulation program to calculate transient currents in key internal transistor structures. Those currents are then applied at the circuit level using the SPICE circuit analysis program. The results explain the dependence of transients on input differential voltage, as well as the dependence of transient signals on output loading conditions. Error rate predictions based on laboratory testing and modeling are in close agreement with the observed number of "trips" in comparators within power control modules that have operated in a deep space environment for nearly three years.

引用

页码：2624 / 2633

页数：10

共 16 条

[1] 3-DIMENSIONAL SIMULATION OF CHARGE COLLECTION AND MULTIPLE-BIT UPSET IN SI DEVICES [J].