Nanofabrication with step and flash imprint lithography

被引:54
作者
Stewart, MD [1 ]
Johnson, SC
Sreenivasan, SV
Resnick, DJ
Willson, CG
机构
[1] Univ Texas, Dept Chem Engn, Austin, TX 78712 USA
[2] Mol Imprints Inc, Austin, TX 78758 USA
[3] Motorala Labs, Tempe, AZ 85284 USA
来源
JOURNAL OF MICROLITHOGRAPHY MICROFABRICATION AND MICROSYSTEMS | 2005年 / 4卷 / 01期
关键词
imprint lithography; step and flash imprint lithography; nano-imprint;
D O I
10.1117/1.1862650
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Step and flash imprint lithography (SFIL) has made tremendous progress since its initial development at The University of Texas at Austin in the late 1990s. The SFIL process went from laboratory to commercialization in under five years, and the number of technical hurdles that must be cleared before it is recognized as fully competitive with optical or EUV lithography for sub-50-nm patterning is dwindling. Patterning resolution has been demonstrated down to 20 nm, with the limit so far being only the template fabrication process. The SFIL method was developed from the beginning with the precision overlay/alignment requirements of multilevel device fabrication in mind. It was recognized that it would be inherently easier to achieve overlay and alignment accuracy with a constant temperature and low pressure imprinting process, and already tool designers have built on SFIL's advantages to produce tools that are viable for multilayer device fabrication. Early tools have demonstrated better than, 10-nm alignment resolution, and no insurmountable fundamental issues have been identified that would prevent alignment resolution from reaching the tight tolerances required for integrated circuit manufacturing. With any contact printing method, process-generated defects are a concern, but the SFIL process has proven to be surprisingly robust with an inherent self-cleaning mechanism for removing particle contamination. Furthermore, new template surface treatments have been developed that improve mold lifetime and minimize defect generation. SFIL shows promise as a low cost manufacturing tool for a wide variety of semiconductor, microelectromechanical, optoelectronic, microfluidic, and other devices. This work summarizes the state of development of step and flash imprint lithography and discusses its potential as a general nanofabrication tool. (c) 2005 Society of Photo-Optical Instrumentation Engineers.
引用
收藏
页码:1 / 6
页数:6
相关论文
共 22 条
[1]   Step and flash imprint lithography: Defect analysis [J].
Bailey, T ;
Smith, B ;
Choi, BJ ;
Colburn, M ;
Meissl, M ;
Sreenivasan, SV ;
Ekerdt, JG ;
Willson, CG .
JOURNAL OF VACUUM SCIENCE & TECHNOLOGY B, 2001, 19 (06) :2806-2810
[2]  
CHOI BJ, UNPUB DISTORTION OVE
[3]   Sub-10 nm imprint lithography and applications [J].
Chou, SY ;
Krauss, PR ;
Zhang, W ;
Guo, LJ ;
Zhuang, L .
JOURNAL OF VACUUM SCIENCE & TECHNOLOGY B, 1997, 15 (06) :2897-2904
[4]   Nanoimprint lithography [J].
Chou, SY ;
Krauss, PR ;
Renstrom, PJ .
JOURNAL OF VACUUM SCIENCE & TECHNOLOGY B, 1996, 14 (06) :4129-4133
[5]   Ramifications of lubrication theory on imprint lithography [J].
Colburn, M ;
Choi, BJ ;
Sreenivasan, SV ;
Bonnecaze, RT ;
Willson, CG .
MICROELECTRONIC ENGINEERING, 2004, 75 (03) :321-329
[6]   Step and flash imprint lithography for sub-100nm patterning [J].
Colburn, M ;
Grot, A ;
Amistoso, M ;
Choi, BJ ;
Bailey, T ;
Ekerdt, J ;
Sreenivasan, SV ;
Hollenhorst, S ;
Willson, CG .
EMERGING LITHOGRAPHIC TECHNOLOGIES IV, 2000, 3997 :453-457
[7]   Step and flash imprint lithography: A new approach to high-resolution patterning [J].
Colburn, M ;
Johnson, S ;
Stewart, M ;
Damle, S ;
Bailey, T ;
Choi, B ;
Wedlake, M ;
Michaelson, T ;
Sreenivasan, SV ;
Ekerdt, J ;
Willson, CG .
EMERGING LITHOGRAPHIC TECHNOLOGIES III, PTS 1 AND 2, 1999, 3676 :379-389
[8]  
COLBURN M, 2001, THESIS U TEXAS AUSTI
[9]   Mold-assisted nanolithography: A process for reliable pattern replication [J].
Haisma, J ;
Verheijen, M ;
vandenHeuvel, K ;
vandenBerg, J .
JOURNAL OF VACUUM SCIENCE & TECHNOLOGY B, 1996, 14 (06) :4124-4128
[10]   Fabrication of multi-tiered structures on step and flash imprint lithography templates [J].
Johnson, S ;
Resnick, DJ ;
Mancini, D ;
Nordquist, K ;
Dauksher, WJ ;
Gehoski, K ;
Baker, JH ;
Dues, L ;
Hooper, A ;
Bailey, TC ;
Sreenivasan, SV ;
Ekerdt, JG ;
Willson, CG .
MICROELECTRONIC ENGINEERING, 2003, 67-8 :221-228