Engineering High Dielectric Constant Materials for Band-Edge CMOS Applications

被引：60

作者：

Jagannathan, H. ^{[1
]}

Narayanan, V. ^{[2
]}

Brown, S. ^{[2
]}

机构：

[1] IBM Res Corp, Albany NanoTech, 255 Fuller Rd, Albany, NY 12203 USA

[2] IBM Res Corp, Thomas J Watson Res Ctr, Yorktown Hts, NY 10598 USA

来源：

PHYSICS AND TECHNOLOGY OF HIGH-K GATE DIELECTRICS 6 | 2008年 / 16卷 / 05期

关键词：

D O I：

10.1149/1.2981584

中图分类号：

O646 [电化学、电解、磁化学];

学科分类号：

081704 ;

摘要：

This paper summarizes studies performed using capping layers in conjunction with high-K dielectrics to obtain band-edge CMOS devices. MgO and Al2O3 cap layers are evaluated for nFET and pFET devices respectively. By precisely positioning the cap materials in the gate stack and evaluating their effect as a function of process temperature and capping layer thickness, a deeper understanding of the mechanism of threshold voltage shift caused by the capping layers is obtained. MgO is observed to readily diffuse into the HfO2 stack at temperatures as low as 600 degrees C while Al2O3 diffuses through HfO2 at higher temperatures of 1000 degrees C. MgO caps located below the HfO2 and processed at 600 degrees C provide the best scaling and maximum voltage shift while a trade-off between scaling and voltage shift has to be made when using Al2O3 caps.

引用

页码：19 / +

页数：2

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