Intrinsic threshold voltage instability of the HfO2NMOS transistors

被引：37

作者：

Bersuker, G. ^{[1
]}

Sim, J. H. ^{[1
]}

Park, C. S. ^{[1
]}

Young, C. D. ^{[1
]}

Nadkarni, S. ^{[1
]}

Choi, R. ^{[1
]}

Lee, B. H. ^{[1
]}

机构：

[1] SEMATECH, 2706 Montopolis Dr, Austin, TX 78741 USA

来源：

2006 IEEE INTERNATIONAL RELIABILITY PHYSICS SYMPOSIUM PROCEEDINGS - 44TH ANNUAL | 2006年

关键词：

high-k; electron traps; threshold voltage instability;

D O I：

10.1109/RELPHY.2006.251213

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Electron trapping in high-k gate dielectrics under constant voltage stress is investigated. It is suggested that the electron trapping occurs through a two-step process: resonant tunneling of the injected electron into the pre-existing defects (fast trapping) and temperature-activated migration of trapped electrons to unoccupied traps (slow trapping). The proposed model successfully describes low temperature threshold voltage instability in NMOS transistors with HfO2/TiN gate stacks.

引用

页码：179 / +

页数：2

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