A compact CAD model for amorphous silicon thin film transistors simulation .1. dc analysis

被引：15

作者：

Merckel, G ^{[1
]}

Rolland, A ^{[1
]}

机构：

[1] FRANCE TELECOM,CNET LANNION,TECHNOPOLE ANTICIPA,F-22307 LANNION,FRANCE

来源：

SOLID-STATE ELECTRONICS | 1996年 / 39卷 / 08期

关键词：

D O I：

10.1016/0038-1101(96)00011-1

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A compact and accurate CAD model for d.c. analysis of hydrogenated amorphous silicon (aSi:H) thin film transistors (TFT) is presented. The model describes the weak and strong accumulation regimes. The current-voltage characteristics are related to the main basic material and device parameters. Below threshold, deep states and surface states are taken into account; above threshold, the model is based on previous published results combined with the MOSFET modeling concept. The parameters are meaningful, the extraction procedures are easy and presented in detail. The model is specially suited for device optimization, process control and computer aided design of liquid crystal displays (LCDs). Copyright (C) 1996 Elsevier Science Ltd

引用

页码：1231 / 1239

页数：9

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