Reliability Challenges for CMOS Technology Qualifications With Hafnium Oxide/Titanium Nitride Gate Stacks

被引：157

作者：

Kerber, Andreas ^{[1
]}

Cartier, Eduard Albert ^{[2
]}

机构：

[1] Adv Micro Devices Inc, Yorktown Hts, NY 10598 USA

[2] IBM Corp, Div Res, Yorktown Hts, NY 10598 USA

来源：

IEEE TRANSACTIONS ON DEVICE AND MATERIALS RELIABILITY | 2009年 / 9卷 / 02期

关键词：

Bias temperature instability; dielectric breakdown; HfO2; high-k; metal gate; MOSFETs; reliability; stress induced leakage current (SILC); TiN; HIGH-K; PROGRESSIVE BREAKDOWN; ELECTRON-MOBILITY; HIGH-KAPPA; OXIDE; DEVICES; PREDICTION; LAYERS; DEGRADATION; INSTABILITY;

D O I：

10.1109/TDMR.2009.2016954

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

It has been demonstrated that the introduction of HfO2/TiN gate stacks into CMOS technologies provides the means to continue with traditional device gate length scaling. However, the introduction of HfO2 as a new gate dielectric and TiN as a metallic gate electrode into the gate stack of FETs brings about new challenges for understanding reliability physics and qualification. This contribution summarizes recent advances in the understanding of charge trapping and defect generation in HfO2/TiN gate stacks. This paper relates the electrical properties to the chemical/physical properties of the high-e dielectric and discusses test procedures specifically tailored to quantify gate stack reliability of HfO2/TiN gate stacks.

引用

页码：147 / 162

页数：16

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