Progressive breakdown characteristics of high-K/metal gate stacks

被引：33

作者：

Bersuker, G. ^{[1
]}

Chowdhury, N. ^{[1
]}

Young, C. ^{[1
]}

Heh, D. ^{[1
]}

Misra, D. ^{[2
]}

Choi, R. ^{[1
]}

机构：

[1] SEMATECH, 2706 Montopolis Dr, Austin, TX 78741 USA

[2] New Jersey Inst Technol, Newark, NJ 07102 USA

来源：

2007 IEEE INTERNATIONAL RELIABILITY PHYSICS SYMPOSIUM PROCEEDINGS - 45TH ANNUAL | 2007年

关键词：

high-k; trap generation; breakdown;

D O I：

10.1109/RELPHY.2007.369867

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

Breakdown characteristics of Hf-based high-k dielectrics in a wide thickness range were investigated to identify the "weak link" in the gate stack and its leading breakdown mechanisms under inversion stress. A strong correlation among the growth rates of the stress leakage current, SH-C, and interface trap density suggests that breakdown is triggered by trap generation in the interfacial SiO2 layer. Stress-time evolution of the differential resistance and its slope obtained from SILC data allows progressive breakdown in highk/metal gate stacks to be identified.

引用

页码：49 / +

页数：2

共 12 条

[1] The effect of interfacial layer properties on the performance of Hf-based gate stack devices [J].